Researcher

Pi-Juei Wang

Profile

Pi-Juei Wang leads research on high-κ dielectric and metal gate stacks for advanced CMOS nodes, spanning atomic-layer deposition of hafnium-zirconium oxide and interface passivation. Her collaboration with TSMC contributed to gate-dielectric reliability qualification at the 3 nm node. She received Taiwan's Presidential Science Prize and has trained over 60 doctoral graduates now at major foundries.

Industry Ties